Luckfox Pico Ultra W的开发板camera模块i2c管脚配置选择

  • 您好,硬件布线相关的修改我们不提供相关的技术支持,修改控制的i2c引脚保证电平标准(1.8V)一致后参考设备树修改即可
  • Crocodile wrote: 2024-10-10 1:52 您好,硬件布线相关的修改我们不提供相关的技术支持,修改控制的i2c引脚保证电平标准(1.8V)一致后参考设备树修改即可
    你好,现在就是想问问参考设备树修改管脚的地方,譬如说,配置的控制外接管脚现在是 I2C4_SCL_M2和I2C4_SDA_M2,接收通道的外接管脚是LVDS_D0_P、LVDS_D0_N、LVDS_D1_P、LVDS_D1_N,改成控制外接管脚i2c3,接收通道改成LVDS_D2_P、LVDS_D2_N、LVDS_D3_P、LVDS_D3_N
  • 这个就需要您自行验证了,我们仅做过基于luckfox pico的测试,这里提供一份参考rockchip官方双摄设备树修改下来的基于dphy2的设备树配置,不能保证一定能顺利运行 以官方手册为准

    Code: Select all

    &csi2_dphy_hw {
    	status = "okay";
    };
    
    &csi2_dphy2 {
    	status = "okay";
    
    	ports {
    		#address-cells = <1>;
    		#size-cells = <0>;
    
    		port@0 {
    			reg = <0>;
    			#address-cells = <1>;
    			#size-cells = <0>;
    
    			csi_dphy2_input2: endpoint@2 {
    				reg = <2>;
    				remote-endpoint = <&sc3336_1_out>;
    				data-lanes = <1 2>;
    			};
    
    		};
    
    		port@1 {
    			reg = <1>;
    			#address-cells = <1>;
    			#size-cells = <0>;
    
    			csi_dphy_output1: endpoint@0 {
    				reg = <0>;
    				remote-endpoint = <&mipi1_csi2_input>;
    			};
    		};
    	};
    };
    
    &i2c3 {
    	status = "okay";
    	clock-frequency = <400000>;
    	pinctrl-names = "default";
    	pinctrl-0 = <&i2c3m2_xfer>;
    
    	sc3336_1: sc3336_1@30 {
    		compatible = "smartsens,sc3336";
    		status = "okay";
    		reg = <0x30>;
    		clocks = <&cru MCLK_REF_MIPI0>;
    		clock-names = "xvclk";
    		pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
    		pinctrl-names = "default";
    		pinctrl-0 = <&mipi_refclk_out1>;
    		rockchip,camera-module-index = <0>;
    		rockchip,camera-module-facing = "back";
    		rockchip,camera-module-name = "CMK-OT2119-PC1";
    		rockchip,camera-module-lens-name = "30IRC-F16";
    		port {
    			sc3336_1_out: endpoint {
    				remote-endpoint = <&csi_dphy2_input2>;
    				data-lanes = <1 2>;
    			};
    		};
    	};
    };
    
    &mipi1_csi2 {
    	status = "okay";
    
    	ports {
    		#address-cells = <1>;
    		#size-cells = <0>;
    
    		port@0 {
    			reg = <0>;
    			#address-cells = <1>;
    			#size-cells = <0>;
    
    			mipi1_csi2_input: endpoint@1 {
    				reg = <1>;
    				remote-endpoint = <&csi_dphy_output1>;
    			};
    		};
    
    		port@1 {
    			reg = <1>;
    			#address-cells = <1>;
    			#size-cells = <0>;
    
    			mipi1_csi2_output: endpoint@0 {
    				reg = <0>;
    				remote-endpoint = <&cif_mipi_in1>;
    			};
    		};
    	};
    };
    
    &rkcif {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&mipi_pins>;
    };
    
    &rkcif_mipi_lvds_sditf {
    	status = "okay";
    
    	port {
    		/* MIPI CSI-2 endpoint */
    		mipi_lvds_sditf: endpoint {
    			remote-endpoint = <&isp_in>;
    		};
    	};
    };
    
    &rkcif_mipi_lvds1 {
    	status = "okay";
    
    	port {
    		/* MIPI CSI-2 endpoint */
    		cif_mipi_in1: endpoint {
    			remote-endpoint = <&mipi1_csi2_output>;
    		};
    	};
    };
    
    &rkisp {
    	status = "okay";
    };
    
    &rkisp_vir0 {
    	status = "okay";
    
    	port@0 {
    		isp_in: endpoint {
    			remote-endpoint = <&mipi_lvds_sditf>;
    		};
    	};
    };