MIPI DBI/ST7789

    1. Modify the DTS file corresponding to your board form factor, enable spi0, and configure the relevant pins and driver. If you need to use the SPI display as a framebuffer, you may refer to this device tree configuration (using the FBTFT driver). As for the tinydrm driver you mentioned, I have not used it before, and I am unsure whether it will conflict with Rockchip's driver (which requires the display to be bound to a VOP).

      Code: Select all

      /**********spi0**********/
      &spi0 {
      	status = "okay";
      	pinctrl-0 = <&rm_io1_spi0_clk &rm_io4_spi0_mosi &rm_io3_spi0_csn0>;
      	#address-cells = <1>;
      	#size-cells = <0>;
      
      	fbtft@0{
      		status = "okay";
      		compatible = "sitronix,st7789v";
      		reg = <0>;
      		spi-max-frequency = <50000000>;
      		fps = <60>;
      		buswidth = <8>;
      		debug = <0x7>;
      		dc-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;      //DC
      		reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;    //RES
      	};
      };
    2. After running ./build.sh config, select Kernel and set the defconfig fragments to empty. This will prevent the kernel configuration from being overwritten.
    3. config.txt is a mechanism specific to the Raspberry Pi. On the Luckfox Lyra, the initialization sequence and resolution must be properly configured directly in the driver source code.
  • Thank you for that. I did realize the config.txt is specific to RPi after a short while. I'm aiming for the TinyDRM driver since many sources say the FBTFT driver is deprecated. If all else fails I'll go with FBTFT but I'm hoping with some of my own research we all can find a solution.

    I'm able to get the system to recognize the panel-mipi-dbi-spi driver without conflicts. The problem now is that the display doesn't render anything when I run `modetest -M panel-mipi-dbi -s 31:240x240@XR24`. I do see it flicker a bit, as if it's initializing, but I don't see the test pattern. Per the author, I also created the required "firmware" file (https://github.com/notro/panel-mipi-dbi/wiki); the driver will not initialize without it.

    I disconnected the display and put SCK/MOSI on a scope. I ran the modetest command again, and I see about three or four "bursts" followed by the actual display render data. None of them contain the hex commands in the firmware file. I'm still troubleshooting whether this is a driver problem, a hardware problem, or a "me" problem.

    See attached images for details on what the scope picked up. Expected init sequence is as follows:

    Code: Select all

    # Adafruit ST7789 MiniPiTFT LCD and TFT Bonnet
    # width=240,height=240
    
    command 0x01  # _SWRESET and Delay 150ms
    delay 150
    
    command 0x11  # _SLPOUT and Delay 10ms
    delay 10
    
    command 0x3A 0x55  # _COLMOD and Delay 10ms
    delay 10
    
    command 0x36 0x08  # _MADCTL Botton->Top Refresh
    command 0x21  # _INVON Hack and Delay 10ms
    delay 10
    
    command 0x13  # _NORON and Delay 10ms
    delay 10
    
    # Command 36h sets the read order from frame memory to the display panel
    # Remember to swap width/height on 0/180 rotations
    #command 0x36 0x00 # rotation 0
    command 0x36 0xA0 # rotation 90
    #command 0x36 0xC0 # rotation 180
    #command 0x36 0x60 # rotation 270
    
    command 0x29  # _DISPON and Delay 500ms
    delay 250
    delay 250
    

    The relevant DTS fragment that I know works, at least with respect to the driver loading and seeing the SPI bus is as follows:

    Code: Select all

    /**********SPI**********/
    &spi1 {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&spi1_clk_pins &spi1_csn1_pins>;
    	#address-cells = <1>;
    	#size-cells = <0>;
    
    	panel@1 {
    		status = "okay";
    		compatible = "panel", "panel-mipi-dbi-spi";
    		reg = <1>;
    		spi-max-frequency = <20000000>;
    		dc_gpios=<&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
    		reset_gpios=<&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
    		backlight-gpios=<&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
    		width-mm=<33>;
    		height-mm=<33>;
                    debug = <3>;
    		write-only;
    		spi-cpha;
    		panel-timing {
    			hactive = <240>;
    			vactive = <240>;
    			hback-porch = <0>;
    			vback-porch = <0>;
    
    			clock-frequency = <0>;
    			hfront-porch = <0>;
    			hsync-len = <0>;
    			vfront-porch = <0>;
    			vsync-len = <0>;
    		};
    	};
    	spidev@1 {
    		compatible = "rockchip,spidev";
    		reg = <1>;
    		status = "disabled";
    		spi-max-frequency = <10000000>;
    	};
    };
    

    I'm still not quite sure how to remap SPI0 to alternate RMII pins, since `<&rm_io1_spi0_clk &rm_io4_spi0_mosi &rm_io3_spi0_csn0>` did not work, but I can live with SPI1.1 instead of SPI0.0 for now.

    Thanks again for any assistance!

    **UPDATE** I compared against my RasPi Zero that does work, and even that isn't sending the correct init sequence. It also requires the clock polarity to be inverted, which, according to the display datasheet, is incorrect. The init sequence taken from Notro's GitHub doesn't work, but another one I found on Reddit does work. So at this point I'm lost.

    Attachments
    scope-overview.png
    scope-chunk4.png
    scope-chunk3.png
    scope-chunk2.png
    scope-chunk1.png
    Last edited by nobuddy2012 on 2026-05-29 20:52, edited 1 time in total.