Re: How can i configure 2 mcp2518 chips on pico mini b?
Posted: 2025-04-10 3:44
Can you share your final DTS?, i'm still have problems
A short text to describe your forum
http://forums.luckfox.com/
Yes of course.
Code: Select all
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
*/
/dts-v1/;
#include "rv1106.dtsi"
#include "rv1106-evb.dtsi"
#include "rv1106-luckfox-pico-pro-max-ipc.dtsi"
/ {
model = "Luckfox Pico Pro";
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1106";
};
/**********FLASH**********/
&sfc {
status = "okay";
flash@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <75000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
};
};
/**********SDMMC**********/
&sdmmc {
max-frequency = <50000000>;
no-sdio;
no-mmc;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
status = "okay";
};
/**********ETH**********/
&gmac {
status = "okay";
};
/**********USB**********/
&u2phy {
status = "okay";
};
&u2phy_otg {
rockchip,dis-u2-susphy;
status = "okay";
};
&usbdrd {
status = "okay";
};
&usbdrd_dwc3 {
status = "okay";
dr_mode = "peripheral";
};
/**********SPI**********/
&spi0 {
status = "okay";
spidev@0 {
spi-max-frequency = <50000000>;
};
fbtft@0 {
spi-max-frequency = <50000000>;
};
};
/**********I2C**********/
/* I2C3_M1 */
&i2c3 {
status = "disabled";
clock-frequency = <100000>;
};
/* I2C1_M1 */
&i2c1 {
status = "disabled";
clock-frequency = <100000>;
};
/**********UART**********/
/* UART3_M1 */
&uart3 {
status = "disabled";
};
/* UART4_M1 */
&uart4 {
status = "disabled";
};
/**********RTC**********/
&rtc {
status = "okay";
};
Code: Select all
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
*/
#include "rv1106-amp.dtsi"
/ {
chosen {
bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyFIQ0 root=/dev/mmcblk1p7 rootwait snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0";
};
acodec_sound: acodec-sound {
compatible = "simple-audio-card";
simple-audio-card,name = "rv-acodec";
simple-audio-card,format = "i2s";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,cpu {
sound-dai = <&i2s0_8ch>;
};
simple-audio-card,codec {
sound-dai = <&acodec>;
};
};
vcc_1v8: vcc-1v8 {
compatible = "regulator-fixed";
regulator-name = "vcc_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vcc_3v3: vcc-3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc_3v3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vdd_arm: vdd-arm {
compatible = "regulator-fixed";
regulator-name = "vdd_arm";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1000000>;
regulator-init-microvolt = <900000>;
regulator-always-on;
regulator-boot-on;
};
leds: leds {
compatible = "gpio-leds";
work_led: work{
gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "activity";
default-state = "on";
};
};
// DHT11
dht11_sensor {
compatible = "dht11";
pinctrl-names = "default";
pinctrl-0 = <&gpio1_pc7>;
dht11@1 {
gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>;
label = "dht11";
linux,default-trigger = "humidity";
};
};
can0: mcp2515@0 {
compatible = "microchip,mcp2515";
reg = <0 0>;
clocks = <&clk_mcp2515>;
clock-names = "mcp2515";
spi-max-frequency = <10000000>;
interrupt-parent = <&gpio1>;
interrupts = <RK_PC7 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&vcc_3v3>;
xceiver-supply = <&vcc_3v3>;
};
clk_mcp2515: clk_mcp2515 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <16000000>;
};
};
/***************************** AUDIO ********************************/
&i2s0_8ch {
#sound-dai-cells = <0>;
status = "okay";
};
&acodec {
#sound-dai-cells = <0>;
pa-ctl-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
status = "okay";
};
/***************************** CPU ********************************/
&cpu0 {
cpu-supply = <&vdd_arm>;
};
/***************************** ADC ********************************/
&saradc {
status = "okay";
vref-supply = <&vcc_1v8>;
};
&tsadc {
status = "okay";
};
/***************************** CSI ********************************/
&csi2_dphy_hw {
status = "okay";
};
&csi2_dphy0 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
csi_dphy_input0: endpoint@0 {
reg = <0>;
remote-endpoint = <&sc3336_out>;
data-lanes = <1 2>;
};
csi_dphy_input1: endpoint@1 {
reg = <1>;
remote-endpoint = <&sc4336_out>;
data-lanes = <1 2>;
};
csi_dphy_input2: endpoint@2 {
reg = <2>;
remote-endpoint = <&sc530ai_out>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csi_dphy_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_csi2_input>;
};
};
};
};
&i2c4 {
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c4m2_xfer>;
sc3336: sc3336@30 {
compatible = "smartsens,sc3336";
status = "okay";
reg = <0x30>;
clocks = <&cru MCLK_REF_MIPI0>;
clock-names = "xvclk";
pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipi_refclk_out0>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CMK-OT2119-PC1";
rockchip,camera-module-lens-name = "30IRC-F16";
port {
sc3336_out: endpoint {
remote-endpoint = <&csi_dphy_input0>;
data-lanes = <1 2>;
};
};
};
sc4336: sc4336@30 {
compatible = "smartsens,sc4336";
status = "okay";
reg = <0x30>;
clocks = <&cru MCLK_REF_MIPI0>;
clock-names = "xvclk";
pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipi_refclk_out0>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "OT01";
rockchip,camera-module-lens-name = "40IRC_F16";
port {
sc4336_out: endpoint {
remote-endpoint = <&csi_dphy_input1>;
data-lanes = <1 2>;
};
};
};
sc530ai: sc530ai@30 {
compatible = "smartsens,sc530ai";
status = "okay";
reg = <0x30>;
clocks = <&cru MCLK_REF_MIPI0>;
clock-names = "xvclk";
pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipi_refclk_out0>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CMK-OT2115-PC1";
rockchip,camera-module-lens-name = "30IRC-F16";
port {
sc530ai_out: endpoint {
remote-endpoint = <&csi_dphy_input2>;
data-lanes = <1 2>;
};
};
};
};
&mipi0_csi2 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csi_dphy_output>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in>;
};
};
};
};
&rkcif {
status = "okay";
};
&rkcif_mipi_lvds {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mipi_pins>;
port {
/* MIPI CSI-2 endpoint */
cif_mipi_in: endpoint {
remote-endpoint = <&mipi_csi2_output>;
};
};
};
&rkcif_mipi_lvds_sditf {
status = "okay";
port {
/* MIPI CSI-2 endpoint */
mipi_lvds_sditf: endpoint {
remote-endpoint = <&isp_in>;
};
};
};
&rkisp {
status = "okay";
};
&rkisp_vir0 {
status = "okay";
port@0 {
isp_in: endpoint {
remote-endpoint = <&mipi_lvds_sditf>;
};
};
};
/*****************************PINCTRL********************************/
// SPI
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0m0_clk &spi0m0_miso &spi0m0_mosi &spi0m0_cs0>;
mcp2515@0 {
compatible = "microchip,mcp2515";
reg = <0 0>;
spi-max-frequency = <10000000>;
interrupts = <RK_PC7 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio1>;
clocks = <&clk_mcp2515>;
clock-names = "mcp2515";
};
};
// I2C
&i2c0 {
pinctrl-0 = <&i2c0m2_xfer>;
};
&i2c1 {
pinctrl-0 = <&i2c1m1_xfer>;
};
&i2c3 {
pinctrl-0 = <&i2c3m1_xfer &i2c3m0_xfer>;
};
// &i2c4 {
// pinctrl-0 = <&i2c4m0_xfer>;
// };
// UART
&uart0 {
pinctrl-0 = <&uart0m0_xfer &uart0m1_xfer>;
};
&uart1 {
pinctrl-0 = <&uart1m1_xfer>;
};
&uart3 {
pinctrl-0 = <&uart3m1_xfer>;
};
&uart4 {
pinctrl-0 = <&uart4m1_xfer>;
};
&uart5 {
pinctrl-0 = <&uart5m0_xfer>;
};
// PWM
&pwm0 {
pinctrl-0 = <&pwm0m1_pins>;
};
&pwm2 {
pinctrl-0 = <&pwm2m2_pins>;
};
&pwm3 {
pinctrl-0 = <&pwm3m2_pins>;
};
&pwm4 {
pinctrl-0 = <&pwm4m2_pins>;
};
&pwm5 {
pinctrl-0 = <&pwm5m2_pins>;
};
&pwm6 {
pinctrl-0 = <&pwm6m1_pins &pwm6m2_pins>;
};
&pwm8 {
pinctrl-0 = <&pwm8m1_pins>;
};
&pwm9 {
pinctrl-0 = <&pwm9m1_pins>;
};
&pwm10 {
pinctrl-0 = <&pwm10m1_pins &pwm10m2_pins>;
};
&pwm11 {
pinctrl-0 = <&pwm11m1_pins>;
};
&pinctrl {
spi0 {
spi0m0_clk: spi0m0-clk {
rockchip,pins = <1 RK_PC1 4 &pcfg_pull_none>;
};
spi0m0_mosi: spi0m0-mosi {
rockchip,pins = <1 RK_PC2 6 &pcfg_pull_none>;
};
spi0m0_miso: spi0m0-miso {
rockchip,pins = <1 RK_PC3 6 &pcfg_pull_none>;
};
spi0m0_cs0: spi0m0-cs0 {
rockchip,pins = <1 RK_PC0 4 &pcfg_pull_none>;
};
};
gpio1-pc7 {
gpio1_pc7:gpio1-pc7 {
rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
Code: Select all
./build.sh kernelconfig
Code: Select all
./build.sh buildrootconfig
either "dev" is duplicate, or "type" is garbage
Code: Select all
diff --git a/sysdrv/source/kernel/arch/arm/boot/dts/rv1103g-luckfox-pico-mini.dts b/sysdrv/source/kernel/arch/arm/boot/dts/rv1103g-luckfox-pico-mini.dts
index 85ce5b81d6f2..88d509272138 100755
--- a/sysdrv/source/kernel/arch/arm/boot/dts/rv1103g-luckfox-pico-mini.dts
+++ b/sysdrv/source/kernel/arch/arm/boot/dts/rv1103g-luckfox-pico-mini.dts
@@ -12,6 +12,13 @@
/ {
model = "Luckfox Pico Mini";
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1103";
+
+ /* 8 MHz crystal on the MCP2515 module */
+ clk_mcp2515: clk-mcp2515 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <8000000>;
+ };
};
/**********SFC**********/
@@ -34,10 +41,10 @@ &sdmmc {
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
-
+
//sdio
cap-sdio-irq;
- non-removable;
+ non-removable;
no-1-8-v;
supports-sdio;
@@ -58,11 +65,32 @@ &usbdrd_dwc3 {
};
/**********SPI**********/
-/* SPI0_M0 */
&spi0 {
- status = "disabled";
- spidev@0 {
- spi-max-frequency = <50000000>;
+ status = "okay";
+ /delete-node/ spidev@0;
+ /delete-node/ fbtft@0;
+
+ /*
+ * SPI0_M0 — MCP2515 CAN controller (8 MHz module)
+ *
+ * Wiring (Pico Mini B board pin → MCP2515):
+ * Pin 6 GPIO1_C0 (SPI0_CS0_M0) → CS
+ * Pin 7 GPIO1_C1 (SPI0_CLK_M0) → SCK
+ * Pin 8 GPIO1_C2 (SPI0_MOSI_M0) → SI
+ * Pin 9 GPIO1_C3 (SPI0_MISO_M0) → SO
+ * Pin 18 GPIO0_A4 → INT (active-low)
+ */
+ mcp2515@0 {
+ compatible = "microchip,mcp2515";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+ clocks = <&clk_mcp2515>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA4 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcp2515_int>;
+ vdd-supply = <&vcc_3v3>;
+ xceiver-supply = <&vcc_3v3>;
};
};
@@ -89,3 +117,13 @@ &uart4 {
&pwm1 {
status = "disabled";
};
+
+/**********PINCTRL**********/
+&pinctrl {
+ mcp2515 {
+ /* GPIO0_A4 (board pin 18) as active-low interrupt input */
+ mcp2515_int: mcp2515-int {
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
Code: Select all
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2023 Luckfox Electronics Co., Ltd.
*/
/dts-v1/;
#include "rv1103.dtsi"
#include "rv1106-evb.dtsi"
#include "rv1103-luckfox-pico-ipc.dtsi"
/ {
model = "Luckfox Pico Mini";
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1103";
/* 8 MHz crystal on the MCP2515 module */
clk_mcp2515: clk-mcp2515 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <8000000>;
};
};
/**********SFC**********/
&sfc {
status = "okay";
flash@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <75000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
};
};
/**********SDMMC**********/
&sdmmc {
max-frequency = <50000000>;
no-mmc;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
//sdio
cap-sdio-irq;
non-removable;
no-1-8-v;
supports-sdio;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
status = "okay";
};
/**********ETH**********/
&gmac {
status = "disabled";
};
/**********USB**********/
&usbdrd_dwc3 {
status = "okay";
dr_mode = "peripheral";
};
/**********SPI**********/
&spi0 {
status = "okay";
/delete-node/ spidev@0;
/delete-node/ fbtft@0;
/*
* SPI0_M0 — MCP2515 CAN controller (8 MHz module)
*
* Wiring (Pico Mini B board pin → MCP2515):
* Pin 6 GPIO1_C0 (SPI0_CS0_M0) → CS
* Pin 7 GPIO1_C1 (SPI0_CLK_M0) → SCK
* Pin 8 GPIO1_C2 (SPI0_MOSI_M0) → SI
* Pin 9 GPIO1_C3 (SPI0_MISO_M0) → SO
* Pin 18 GPIO0_A4 → INT (active-low)
*/
mcp2515@0 {
compatible = "microchip,mcp2515";
reg = <0>;
spi-max-frequency = <10000000>;
clocks = <&clk_mcp2515>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA4 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&mcp2515_int>;
vdd-supply = <&vcc_3v3>;
xceiver-supply = <&vcc_3v3>;
};
};
/**********I2C**********/
/* I2C3_M1 */
&i2c3 {
status = "disabled";
clock-frequency = <100000>;
};
/**********UART**********/
/* UART3_M1 */
&uart3 {
status = "disabled";
};
/* UART4_M1 */
&uart4 {
status = "disabled";
};
/**********PWM**********/
/* PWM1_M0 */
&pwm1 {
status = "disabled";
};
/**********PINCTRL**********/
&pinctrl {
mcp2515 {
/* GPIO0_A4 (board pin 18) as active-low interrupt input */
mcp2515_int: mcp2515-int {
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
Code: Select all
dmesg | grep -E 'can|spi|mcp251x'
[ 0.186383] can: controller area network core
[ 0.186477] can: raw protocol
[ 0.186490] can: broadcast manager protocol
[ 0.186505] can: netlink gateway - max_hops=1
[ 0.422259] ubi0: scanning is finished
[ 8.172462] ubi4: scanning is finished
[ 9.804153] ubi5: scanning is finished
[ 10.803582] mcp251x spi0.0 can0: bit-timing not yet defined
[ 10.803612] mcp251x spi0.0: unable to set initial baudrate!
Code: Select all
ip link set can0 type can bitrate 500000 && \
ip link set can0 up && \
echo "Success!"
Code: Select all
ip -details link show can0
2: can0: <NOARP,UP,LOWER_UP,ECHO> mtu 16 qdisc pfifo_fast state UP mode DEFAULT group default qlen 10
link/can promiscuity 0 minmtu 0 maxmtu 0
can state ERROR-ACTIVE restart-ms 0
bitrate 500000 sample-point 0.750
tq 250 prop-seg 2 phase-seg1 3 phase-seg2 2 sjw 1 brp 1
mcp251x: tseg1 3..16 tseg2 2..8 sjw 1..4 brp 1..64 brp_inc 1
clock 4000000 numtxqueues 1 gso_max_size 65536 gso_max_segs 65535