Deep sleep support

  • Hello, ideal deep sleep requires the support of hardware design. It needs to achieve IO control over the main voltage domains, and be able to turn off VDD_DDR, VDD_ARM, etc. in the sleep state. However, our product positioning does not consider the sleep scenario and cannot control the power off. It can only enter the sleep state designed by RK with clock shutdown. Refer to viewtopic.php?t=1395&hilit=%E4%BC%91%E7%9C%A0.
    For other modes of kernel power management, we have no relevant experience. It can be confirmed that the power management on Rockchip chips and the power management of the main kernel are different.